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VLSI Design and Verification

Published date: 2026/11/07
  • Location: Bangalore, Karnataka, India
VLSI Design Engineer - FPGA/SoC Architecture, RTL Design in Verilog/VHDL, UVM Based Verification, Synthesis and STA, Low Power Verification (CDC, LPF),DFT (SCAN,BIST, Verification), Physical Design in 22nm/14nm, Physical verification (DRC,LVS,SI),Post Silicon Validation (Characterization, Functional validation)
Company Name: Tata Group

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