Sr. Silicon Design Engineer ( Analog PHY/IO design..

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SENIOR SILICON DESIGN ENGINEER

THE ROLE:

The focus of this role is to plan, build, and execute the development of Analog and Digital front ends for High Speed PHY that results in power and performance efficient IP subsystems.

THE PERSON:

Will be part of AMD's analog and mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, gDDR6, HBM2/HBM3,....) and chip-to-chip Gbps proprietary PHY IP solutions. Must have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:
• Collaborate with architects and other team members to implement IP blocks/sub-blocks.
• Design AMS components to meet PPA and life time requirements of the IP.
• Supervise layout and physical design activities to meet sub-block PPA specifications.
• Support product bring-up and debug, sign-off on test plans and characterization reports.
• Interface with SOC teams, system HW/SW teams and global manufacturing teams.

PREFERRED EXPERIENCE:
• 4-7 yrs experience in high speed 10+Gbps serial and/or parallel analog PHY/IO designs.
• Design experience in FinFet advanced CMOS process nodes with a solid understanding of transistor device performance and fundamentals.
• Strong fundamentals and knowledge of analog and IO circuit architecture including Tx and Rx equalization techniques.
• Ownership of AMS blocks such as LDO, CDR, Clock mixer, DLL, bias genreation etc.,
• Experience in high speed custom digital circuit design is a plus.
• Good understanding of power, area and performance trade-offs in mixed signal design.
• Proficient in AMS design flows, tools and methodologies
• Excellent written and verbal communication skills with ability to operate independently but also work cross-functionally, cross-geographies collaborating and being part of a multi-disciplinary team in a dynamic/fast paced environment.
• Productive and able to meet aggressive deadlines working lcosely with architecture and projetc lead/manager to guarantee quality deliverables that meet projetc's schedule and technical requirements.

ACADEMIC CREDENTIALS:
• Bachelors or Masters degree in computer engineering/Electrical Engineering

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